The present invention relates to the fabrication of semiconductor-based devices. More particularly, the present invention relates to improved techniques for fabricating semiconductor-based devices with porous low-k dielectric layers.
In semiconductor-based device (e.g., integrated circuits or flat panel displays) manufacturing, dual damascene structures may be used in conjunction with copper conductor material to reduce the RC delays associated with signal propagation in aluminum based materials used in previous generation technologies. In dual damascene, instead of etching the conductor material, vias, and trenches may be etched into the dielectric material and filled with copper. The excess copper may be removed by chemical mechanical polishing (CMP) leaving copper lines connected by vias for signal transmission. To reduce the RC delays even further, porous low dielectric constant materials may be used. These porous low dielectric constant materials may include porous organo-silicate-glass (OSG) materials. OSG materials may be silicon dioxide doped with organic components such as methyl groups. OSG materials have carbon and hydrogen atoms incorporated into a silicon dioxide lattice, which lowers the dielectric constant of the material. However OSG materials may be susceptible to damage when exposed to O2, H2, and NH3 gases, which are used for stripping photo resist. Porous material has pores, which allow stripping plasmas to reach deeper into the layer causing greater damage.
Porous OSG materials may be very susceptible to damage due to the removal of organic content by exposure to the plasma used to strip the resist and sidewalls. The plasma may diffuse into the pores of the porous OSG layer and cause damage as far as 300 nm into the OSG layer bordering the opening. Part of the damage caused by the plasma is the removal of carbon and hydrogen from the damage area causing the OSG to be more like silicon dioxide, which has a higher dielectric constant. Damage may be quantified by measuring the change in SiC/SiO ratio of the OSG layer from FTIR analysis. When translated to the trench side wall that means a damage of a few hundred angstroms on each side of a 2000 Å trench wall.
It is desirable to reduce damage to porous low-k dielectric layers during the stripping process.